Topic Adviser:Wu Fei

Ph.D,Associate Professor of Huazhong University of Science and Technology.

Ms Wu presided over 2 National Natural Science Foundations, National Natural Science Foundation, Hubei Natural Science Foundation and Wuhan Chenguang Talent Project.In 2008, she won the second prize of Hubei Province Technology Invention, the second prize of military science and technology progress, and the third prize of Wuhan Science and Technology Progress Award. she was invited as a special reviewer of top journals such as TOC, TOS, TCAD and IEEE, and NAS. Program members of international conferences such as APPT.She has published more than 60 papers in top journals such as TOC, TOS, TCAD, and TECS, and applied for more than 20 invention patents.

Main research direction: large-scale data storage, new memory performance and reliability optimization, Error-Correcting Code, and new storage architectures.

Topic:Analysis and Optimization Method Research of 3D CT Flash Performance and Reliability

The era of big data is coming.Flash memory has become a mainstream storage media due to use multi-level, multi-layer stacking and reduced linewidth techniques to significantly increase storage capacity. However, with the increased capacity of flash memory, storage performance and storage reliability are degraded. This report revolves around how to use flash memory efficiently. Taking 3D CT flash memory as an example, the performance and reliability of flash memory are analyzed by qualitative and quantitative, and provide corresponding optimization methods for designers and users.

Audience Benefits:

1. How about the performance and reliability of 3D CT flash?

2. How to design an optimization algorithm to improve the performance and reliability of flash memory?

Speaker:Han Guojun

Vice president and professor of School of Information Engineering ,Guangdong University of Technology, IEEE Senior Member.

From 2011 to 2017, he conducted postdoctoral research and cooperation exchanges at Nanyang Technological University, Hong Kong University of Science and Technology, Singapore University of Technology and Design, and University of Sydney. In recent years, he has published more than 50 papers in authoritative journals and international conferences such as IEEE Communications Surveys and Tutorials、IEEE Transactions on Communication、IEEE Transactions on Vehicular Technology、IEEE Transactions on Magnetics, including 27 papers in SCI journals.

Main research direction: Signal Processing and Error Control Coding Technology for Data Storage

Topic:Interference noise estimation and cancellation techniques that affect the reliability of flash memory

As the NAND flash process shrinks and storage unit capacity increases, various interferences and noises bring new challenges to the reliable storage of data, including interference between memory unit, random telegraph noise, and read/write interference, charge leakage, etc. Data storage reliability can be greatly improved with advanced signal estimation, detection, processing techniques and efficient error control coding techniques. This report will analyze the flash channel model from the view of signal processing, and introduce the estimation and elimination methods of unit interference in detail. By combining the specific coding and decoding techniques, the advanced signal processing and error control technology will play an important role in high-density flash memory systems.

Audience Benefits:

1. The main noise and interference of flash memory;

2. The signal detection technology of SSD;

3. The evolution of error control technology for flash memory.

Speaker:Shi Liang

East China Normal University Professor

Shi Liang graduated from the City University of Hong Kong and the University of Science and Technology of China. He supports the National Natural Science Foundation of China, the Youth Fund, and participates in a number of national 863 science and technology projects. He has published more than 70 academic papers in many international top conference journals including FAST, ATC, MSST, DAC, TC, TMC, TCAD. His major research direction : high-performance storage, embedded storage, intelligent storage and IoT.

Topic:Flash storage compression technology

Flash memory is now widely used in embedded systems, personal systems, and high-performance systems. Thanks to the increase in the size and number of storage unit bits and the development of 3D stacking technology, the capacity of flash memory is expanding, but its performance and reliability are greatly challenged. In this report, unlike the traditional use of compression for space improvement, we will introduce how to use compression technology to improve the reliability, performance and lifetime of flash memory, providing new possibilities for further reference of flash memory.

Audience Benefits:

1.With the increase in flash capacity, what are their weaknesses?

2 How to use compression technology to improve performance, reliability, and lifetime in flash memory?

Speaker:Ellis Liao

SAGE Microelectronics VP of Technical marketing

Ellis Liao has worked on marketing of SSD control chips for more than 10 years. He is the first generation of chip industry practitioners who are popularizing SSD applications. He is familiar with the development of the flash memory industry and the application specifications of various solid-state storage. In the meantime, he worked in the first generation of control chip leader Taiwan JMicron Technology, served as the company's first marketing director, responsible for the overall marketing tasks of the solid state drive chip product line. Currently he is working for Hangzhou SAGE Microelectronics Co., Ltd., responsible for the marketing of SSD chips, market strategy layout, and product planning.

Topic:Design of High Reliability Storage Controller and Storage Module Test System

After flash memory enters the 3D era, changes are getting faster and faster. How to consider the high reliability of the product application when designing the memory controller. What are the key points to consider on the chip design side? From the controller to the module, how to ensure the reliability of the product through the system hardware design, how to design the storage module test process, make the test mode more comprehensive and effective, and can effectively cooperate with the controller design, which is the prerequisite to ensure the reliability of the module in the future.

Audience Benefits:

1.How chip design improves reliability

2. How hardware design enhances reliability

3. The test process checks reliability

Speaker:Adam Zhao

SSDFans founder

Adam Zhao graduated from University of Science and Technology of China, co-founder of the famous flash memory technology community SSDFans, and storage integration technology evangelist,the author of 《Introduction to SSD: Solid State Storage Core Technology, Principles and Actual Combat》.He has worked on computing storage architecture design at Microsoft Research Asia, SandForce, Fangyi, etc.

Topic:Demystifying SSD: From the Lab to Production Road

Sending one SSD to end user should undergo rigorous R&D testing and factory testing. As a veteran flash memory practitioner, he will reveal the rigorous tests that SSD will experience from lab to production.

Audience Benefits:

Understanding the world's top testing and quality control technologies for the development and production of electronic products for industrial mass production, it also has important reference significance for other product quality management and control.